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Published Paper List

Published papers from KIYA and SHIOTA Research Group.

1996

Journal Papers

  1. Masahiro IWAHASHI, Noriyoshi KAMBAYASHI, and Hitoshi KIYA,
    “A Motion Compensation of Scalable Decoder for Drift Reduction,”
    IEICE Trans.,
    vol.J79-A, no.1, pp.125–134, January 1996.
    webpage [4members]
  2. Takeo YOSHIDA, Hitoshi KIYA, and Sachio NAITO,
    “Design Verification for Register Transfer Level Design by Input Label Sets and Control Conditions,”
    IEICE Trans.,
    vol.J79-D, no.1, pp.28–40, January 1996.
    webpage [4members]
  3. Katsushige MATSUBARA, Kiyoshi NISHIKAWA, and Hitoshi KIYA,
    “Pipelined Adaptive Filters Based on Delayed LMS Algorithm,”
    IEICE Trans.,
    vol.J79-A, no.5, pp.1050–1057, May 1996.
    webpage [4members]
  4. Hisashi SAKANE and Hitoshi KIYA,
    “A Super-Resolution Method Based on the Discrete Cosine Transform,”
    IEICE Trans. Fundamentals,
    vol.E79-A, no.6, pp.768–776, June 1996.
    webpage [4members]
  5. Masahiro IWAHASHI, Noriyoshi KAMBAYASHI, and Hitoshi KIYA,
    “A Scalable Decoder with Reduced Hardware Complexity,”
    IEICE Trans.,
    vol.J79-A, no.7, pp.1324–1329, July 1996.
    webpage [4members]
  6. Shogo MURAMATSU and Hitoshi KIYA,
    “A New Factorization Technique for the Generalized Linear-Phase LOT and Its Fast Implementation,”
    IEICE Trans. Fundamentals,
    vol.E79-A, no.8, pp.1173–1179, August 1996.
    webpage [4members]
  7. Kazunobu TOGUCHI, Hiroyuki KOBAYASHI, and Hitoshi KIYA,
    “Subband Adaptive Filters with Perfect Reconstruction DFT Filter Banks,”
    IEICE Trans.,
    vol.J79-A, no.8, pp.1385–1393, August 1996.
    webpage [4members]
  8. Masahiro IWAHASHI, Noriyoshi KAMBAYASHI, and Hitoshi KIYA,
    “Bit Reduction of DCT Basis for Transform Coding,”
    IEICE Trans.,
    vol.J79-B-I, no.53, pp.572–581, August 1996.
    webpage [4members]
  9. Hitoshi KIYA and Hiroyuki KOBAYASHI,
    “Oversampled Filter Banks Based on Polyphase Submatrices,”
    IEICE Trans.,
    vol.J79-A, no.9, pp.1525–1534, September 1996.
    webpage [4members]
  10. Hiroyuki KOBAYASHI and Hitoshi KIYA,
    “A Design Method for Oversampled DFT Filter Banks with the Minimum Delay,”
    IEICE Trans.,
    vol.J79-A, no.11, pp.1801–1807, November 1996.
    webpage [4members]
  11. Shogo MURAMATSU and Hitoshi KIYA,
    “An Efficient Structure of GenLOT for Finite-Duration Sequences and Its Application to M-Band Discrete-Time Wavelet Transforms,”
    IEICE Trans.,
    vol.J79-A, no.12, pp.1966–1976, December 1996.
    webpage [4members]

International Conference Papers

  1. Takeshi UCHIDA, Hitoshi KIYA, and Akihiko YAMADA,
    “Generating a Hierarchical Simulation Model on the Basis of Functional Model of Register Transfers,”
    Proc. IEEE International Symposium on Circuits and Systems,
    1st May, 1996.
  2. Kuniyuki KAJITA, Hiroyuki KOBAYASHI, Shogo MURAMATSU, Akihiko YAMADA, and Hitoshi KIYA,
    “Design Methods for Oversampled DFT Filter Banks,”
    Proc. International Technical Conference on Circuits/Systems, Computers and Communications,
    1st July, 1996.
  3. Katsushige MATSUBARA, Kiyoshi NISHIKAWA, and Hitoshi KIYA,
    “Pipelined Adaptive Filters Based on Two-Dimensional LMS Algorithm,”
    Proc. International Technical Conference on Circuits/Systems, Computers and Communications,
    1st July, 1996.
  4. Shigenori KINJO, Hiroshi OCHI, and Hitoshi KIYA,
    “A New Two-Dimensional Parallel Block Adaptive Digital Filter,”
    Proc. IEEE Midwest Symposium on Circuits and Systems,
    1st August, 1996.
  5. Kuniyuki KAJITA, Hiroyuki KOBAYASHI, Shogo MURAMATSU, Akihiko YAMADA, and Hitoshi KIYA,
    “A Design Method of Oversampled Paraunitary DFT Filter Banks Using House-Holder's Factorization,”
    Proc. EURASIP European Signal Processing Conference,
    1st September, 1996.
  6. Shogo MURAMATSU and Hitoshi KIYA,
    “A New Design Method of Linear-Phase Paraunitary Filter Banks with an Odd Number of Channels,”
    Proc. EURASIP European Signal Processing Conference,
    1st September, 1996.
  7. Hisashi SAKANE, Kiyoshi NISHIKAWA, and Hitoshi KIYA,
    “A Super-Resolution Method Based on the Discrete Cosine Transforms,”
    Proc. EURASIP European Signal Processing Conference,
    1st September, 1996.
  8. XiaoXia ZOU, Shogo MURAMATSU, and Hitoshi KIYA,
    “The Generalized Overlap-Add and Overlap-Save Methods Using Discrete Sine and Cosine Transforms for FIR Filtering,”
    Proc. IEEE International Conference on Signal Processing,
    1st October, 1996.

Domestic Conference Papers

  1. Takeshi UCHIDA, Hitoshi KIYA, and Akihiko YAMADA,

    IPSJ Technical Reports,
    no.DA79-4, 1st February, 1996.
  2. XiaoXia ZOU, Hisashi SAKANE, and Hitoshi KIYA,

    General Conference of IEICE,
    no.A-135, 1st March, 1996.
  3. Katsushige MATSUBARA, Kiyoshi NISHIKAWA, and Hitoshi KIYA,

    General Conference of IEICE,
    no.A-142, 1st March, 1996.
  4. Hiroyuki KOBAYASHI and Hitoshi KIYA,

    General Conference of IEICE,
    no.A-204, 1st March, 1996.
  5. Yasuhiro HARADA, Shogo MURAMATSU, and Hitoshi KIYA,

    General Conference of IEICE,
    no.SA-4--5, 1st March, 1996.
  6. Hiroyuki KOBAYASHI and Hitoshi KIYA,

    Technical Report of IEICE,
    no.DSP96-10, 1st May, 1996.
  7. Takuya YAMAUCHI, Hiroyuki KOBAYASHI, and Hitoshi KIYA,

    Technical Report of IEICE,
    no.DSP96-42, 1st June, 1996.
  8. Keisuke NAKAZONO, Takeshi UCHIDA, Hitoshi KIYA, and Akihiko YAMADA,

    Technical Report of IEICE,
    no.VLD96-14, 1st June, 1996.
  9. Seiji WATANABE, Kiyoshi NISHIKAWA, Nobuo FUJII, and Hitoshi KIYA,

    Technical Report of IEICE,
    no.DSP96-61, 1st July, 1996.
  10. Shogo MURAMATSU and Hitoshi KIYA,

    Technical Report of IEICE,
    no.DSP96-62, 1st July, 1996.
  11. Tsukasa YAMAMOTO, Takeshi UCHIDA, Hitoshi KIYA, and Akihiko YAMADA,

    IPSJ Design Automation Symposium,
    1st August, 1996.
  12. Takeshi UCHIDA, Hitoshi KIYA, and Akihiko YAMADA,

    Society Conference of IEICE,
    no.A-65, 1st September, 1996.
  13. Hiroyuki KOBAYASHI, Takuya YAMAUCHI, and Hitoshi KIYA,

    Society Conference of IEICE,
    no.A-74, 1st September, 1996.
  14. Seiji WATANABE, Nobuo FUJII, and Hitoshi KIYA,

    Society Conference of IEICE,
    no.A-93, 1st September, 1996.
  15. Katsushige MATSUBARA, Kiyoshi NISHIKAWA, and Hitoshi KIYA,

    Society Conference of IEICE,
    no.A-94, 1st September, 1996.
  16. Yasuhiro HARADA, Shogo MURAMATSU, and Hitoshi KIYA,

    Technical Report of IEICE,
    no.CAS96-52, 1st September, 1996.
  17. Katsushige MATSUBARA, Kiyoshi NISHIKAWA, and Hitoshi KIYA,

    IEICE Digital Signal Processing Symposium,
    no.A6-1, 1st November, 1996.
  18. Seiji WATANABE, Hitoshi KIYA, and Nobuo FUJII,

    IEICE Digital Signal Processing Symposium,
    no.B3-3, 1st November, 1996.
  19. XiaoXia ZOU, Shogo MURAMATSU, and Hitoshi KIYA,
    “Implementation of Sampling Rate Conversion with Fewer Delay,”
    Technical Report of IEICE,
    no.DSP96-104, 1st December, 1996.

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