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Published Paper List

Published papers from KIYA and SHIOTA Research Group.

1998

Journal Papers

  1. Kiyoshi NISHIKAWA and Hitoshi KIYA,
    “Conditions for Convergence of Delayless Subband Adaptive Filter and Its Efficient Implementation,”
    IEEE Trans. Signal Processing,
    vol.46, no.4, pp.1158–1167, April 1998.
    DOI webpage PDF [4members]
  2. Shogo MURAMATSU and Hitoshi KIYA,
    “A Design Method of Odd-Channel Linear-Phase Paraunitary Filter Banks with a Lattice Structure,”
    IEICE Trans. Fundamentals,
    vol.E81-A, no.5, pp.976–980, May 1998.
    webpage [4members]
  3. Kiyoshi NISHIKAWA, Takuya YAMAUCHI, and Hitoshi KIYA,
    “Structure of Delayless Subband Adaptive Filter Using Hadamard Transformation,”
    IEICE Trans. Fundamentals,
    vol.E81-A, no.6, pp.1013–1020, June 1998.
    webpage [4members]
  4. Shogo MURAMATSU, Akihiko YAMADA, and Hitoshi KIYA,
    “The Two-Dimensional Lapped Hadamard Transform,”
    IEICE Trans. Fundamentals,
    vol.E81-A, no.8, pp.1542–1549, August 1998.
    webpage [4members]
  5. Akio HARADA, Kiyoshi NISHIKAWA, and Hitoshi KIYA,
    “Pipelined Architecture of the LMS Adaptive Digital Filter with the Minimum Output Latency,”
    IEICE Trans. Fundamentals,
    vol.E81-A, no.8, pp.1578–1585, August 1998.
    webpage [4members]
  6. Yasuhiro HARADA, Shogo MURAMATSU, and Hitoshi KIYA,
    “Multidimensional Multirate Filter and Filter Bank without Checkerboard Effect,”
    IEICE Trans. Fundamentals,
    vol.E81-A, no.8, pp.1607–1615, August 1998.
    webpage [4members]
  7. Hitoshi KIYA, Seiji WATANABE, Kiyoshi NISHIKAWA, and Nobuo FUJII,

    IEICE Trans.,
    vol.J81-A, no.10, pp.1463–1468, October 1998.
    webpage [4members]

International Conference Papers

  1. Shogo MURAMATSU, Akihiko YAMADA, and Hitoshi KIYA,
    “The Two-Dimensional Lapped Hadamard Transform,”
    Proc. IEEE International Symposium on Circuits and Systems,
    1st May, 1998.
  2. Tadaaki KIMIJIMA, Kiyoshi NISHIKAWA, and Hitoshi KIYA,
    “Pipelining of 2-Dimensional Adaptive Filters Based on the LDLMS Algorithm,”
    Proc. IEEE International Symposium on Circuits and Systems,
    1st May, 1998.
  3. Youji YAMADA and Hitoshi KIYA,
    “A Frequency Domain Estimation Algorithm for Impulse Response,”
    Proc. International Technical Conference on Circuits/Systems, Computers and Communications,
    vol.1, 1st July, 1998.
  4. Hitoshi KIYA, Jun FURUKAWA, and Yoshihiro NOGUCHI,
    “Block Matching Motion Estimation Using Less Gray Level Images,”
    Proc. International Technical Conference on Circuits/Systems, Computers and Communications,
    vol.1, 1st July, 1998.
  5. Tadaaki KIMIJIMA, Kiyoshi NISHIKAWA, and Hitoshi KIYA,
    “A Pipelined Architecture for DLMS Algorithm Considering Both Hardware Complexity and Output Latency,”
    Proc. EURASIP European Signal Processing Conference,
    1st September, 1998.
  6. Shogo MURAMATSU, Akihiko YAMADA, and Hitoshi KIYA,
    “A Design Method of 2-D Axial-Symmetric Paraunitary Filter Banks with a Lattice Structure,”
    Proc. EURASIP European Signal Processing Conference,
    1st September, 1998.
  7. Yasuhiro HARADA, Shogo MURAMATSU, and Hitoshi KIYA,
    “Multidimensional Multirate Filter without Checkerboard Effects,”
    Proc. EURASIP European Signal Processing Conference,
    1st September, 1998.
  8. Akio HARADA, Kiyoshi NISHIKAWA, and Hitoshi KIYA,
    “A Pipelined Architecture for the Normalized LMS Adaptive Digital Filters,”
    Proc. IEEE Asia-Pacific Conference on Circuits and Systems,
    1st November, 1998.
  9. Kazuhiro KOJIMA and Hitoshi KIYA,
    “Generalizations of the Image Resolution Conversions in DCT-Domain Using 8 Points Inversed DCT,”
    Proc. IEEE Asia-Pacific Conference on Circuits and Systems,
    1st November, 1998.

Domestic Conference Papers

  1. Masataka OHTA, Yasuhiro HARADA, and Hitoshi KIYA,

    Technical Report of IEICE,
    no.CAS97-91, 1st January, 1998.
  2. Jun FURUKAWA and Hitoshi KIYA,

    Technical Report of IEICE,
    no.CAS97-92, 1st January, 1998.
  3. Hiroyuki KOBAYASHI and Hitoshi KIYA,

    General Conference of IEICE,
    no.A-4-44, 1st March, 1998.
  4. Youji YAMADA and Hitoshi KIYA,

    General Conference of IEICE,
    no.A-4-73, 1st March, 1998.
  5. Tadaaki KIMIJIMA, Kiyoshi NISHIKAWA, and Hitoshi KIYA,

    Technical Report of IEICE,
    no.CAS97-106, 1st March, 1998.
  6. Kiyoshi NISHIKAWA, Hiroshi FUKUSHIMA, and Hitoshi KIYA,
    “Consideration on Using Delayline Instead of an Estimated Secondary Path in the Filtered-X LMS Algorithm,”
    Technical Report of IEICE,
    no.CAS97-107, 1st March, 1998.
  7. Tadaaki KIMIJIMA, Kiyoshi NISHIKAWA, and Hitoshi KIYA,
    “An Effective Architecture of Pipelined LMS Adaptive Filters,”
    General Conference of IEICE,
    no.SA-4-1, 1st March, 1998.
  8. Tsukasa YAMAMOTO, Takeshi UCHIDA, Akihiko YAMADA, and Hitoshi KIYA,
    “A Loop Pipelining Based Design Method for A Motion Estimator with Flexibility of Functional Unit Organization,”
    Technical Report of IEICE,
    no.VLD97-128, 1st March, 1998.
  9. Kazuhiro KOJIMA and Hitoshi KIYA,

    Technical Report of IEICE,
    no.DSP98-2, 1st April, 1998.
  10. Takeshi UCHIDA, Akihiko YAMADA, and Hitoshi KIYA,

    Technical Report of IEICE,
    no.FTS98-6, 1st April, 1998.
  11. Akio HARADA, Kiyoshi NISHIKAWA, and Hitoshi KIYA,

    Technical Report of IEICE,
    no.DSP98-22, 1st May, 1998.
  12. Youji YAMADA, Noriyoshi KAMBAYASHI, and Hitoshi KIYA,

    Technical Report of IEICE,
    no.CAS98-1, 1st June, 1998.
  13. Katsumi TAKAYAMA, Takeshi UCHIDA, Akihiko YAMADA, and Hitoshi KIYA,

    Technical Report of IEICE,
    no.CAS98-25, 1st June, 1998.
  14. Masaharu MURAKAMI and Hitoshi KIYA,

    Technical Report of IEICE,
    no.CAS98-5, 1st June, 1998.
  15. Hiroyuki KOBAYASHI, Yoshihiro NOGUCHI, and Hitoshi KIYA,

    Technical Report of IEICE,
    no.CAS98-6, 1st June, 1998.
  16. Hiroyuki KOBAYASHI and Hitoshi KIYA,

    Society Conference of IEICE,
    no.A-4-14, 1st September, 1998.
  17. Yasuhiro OKADA, Kiyoshi NISHIKAWA, and Hitoshi KIYA,

    Society Conference of IEICE,
    no.A-4-7, 1st September, 1998.
  18. Hitoshi KIYA, Ayuko TAKAGI, and Hiroyuki KOBAYASHI,

    Society Conference of IEICE,
    no.D-11-46, 1st September, 1998.
  19. Ayuko TAKAGI, Hiroyuki KOBAYASHI, Yoshihiro NOGUCHI, and Hitoshi KIYA,

    Technical Report of IEICE,
    no.DSP98-115, 1st October, 1998.
  20. Kiyoshi NISHIKAWA, Yasuhiro OKADA, and Hitoshi KIYA,

    IEICE Digital Signal Processing Symposium,
    no.A6.2, 1st November, 1998.
  21. Yoshihiro NOGUCHI and Hitoshi KIYA,
    “Fast Motion Estimation for MPEG Video Using Sub-Sampled Block Method,”
    IEICE Digital Signal Processing Symposium,
    no.C1.2, 1st November, 1998.
  22. Hiroyuki KOBAYASHI and Hitoshi KIYA,

    IEICE Digital Signal Processing Symposium,
    no.C5.3, 1st November, 1998.
  23. Hiroyuki KOBAYASHI and Hitoshi KIYA,

    Technical Report of IEICE,
    no.DSP98-128, 1st December, 1998.

Others

  1. Hiroyuki KOBAYASHI and Hitoshi KIYA,
    “Design of Oversampled DFT Filter Banks with Minimum Delay,”
    Electronics and Communications in Japan, Part III,
    vol.81, no.1, January 1998.

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