1995

2024  2023  2022  2021  2020  2019  2018  2017  2016  2015  
2014  2013  2012  2011  2010  2009  2008  2007  2006  2005  
2004  2003  2002  2001  2000  1999  1998  1997  1996  1995  
1994  1993  1992  1991  1990  1989  1988  1987  1986  1985  
1984  1983  1982  1981  1980  

Journal paper
  1. Yoshihiro ONO, Kiyoshi NISHIKAWA, Hitoshi KIYA,
    "An Equivalent Model for Subband Adaptive System and Its Performance Analysis,"
    IEICE Trans.,
    vol.J78-A, no.1, pp.30--39, January, 1995.
    [webpage] [Local]
  2. Hitoshi KIYA, Kiyoshi NISHIKAWA, Kouji ASHIHARA,
    "Improvement of Convergence Speed for Subband Adaptive Digital Filter Using the Multirate Repeating Method,"
    IEICE Trans.,
    vol.J78-A, no.2, pp.194--201, February, 1995.
    [webpage] [Local]
  3. Hiroyuki KOBAYASHI, Hitoshi KIYA,
    "An Orthogonal Frequency Division Modulation Method Allowing Hierarchy Reconstruction,"
    IEICE Trans.,
    vol.J78-A, no.3, March, 1995.
    [webpage] [Local]
  4. Shogo MURAMATSU, Hitoshi KIYA,
    "Parallel Processing Techniques for Multidimensional Sampling Lattice Alteration Based on Overlap-Add and Overlap-Save Methods,"
    IEICE Trans. Fundamentals,
    vol.E78-A, no.8, pp.934--943, August, 1995.
    [webpage] [Local]
  5. Kiyoshi NISHIKAWA, Hitoshi KIYA,
    "A Representation Method of the Convergence Characteristic of the LMS Algorithms Using Tap-Input Vectors,"
    IEICE Trans. Fundamentals,
    vol.E78-A, no.10, pp.1362--1368, October, 1995.
    [webpage] [Local]
International conference
  1. Kouji ASHIHARA, Kiyoshi NISHIKAWA, Hitoshi KIYA,
    "Improvement of Convergence Speed for Subband Adaptive Digital Filters Using the Multirate Repeating Method,"
    IEEE International Conference on Acoustics, Speech and Signal Processing,
    1st May, 1995.
  2. Shogo MURAMATSU, Hitoshi KIYA,
    "Multidimensional Parallel Processing Methods for Rational Sampling Lattice Alteration,"
    IEEE International Symposium on Circuits and Systems,
    1st May, 1995.
  3. Hisashi SAKANE, Akihiko UEKI, Hitoshi KIYA,
    "A Discrete Gerchberg-Papoulis Algorithm Based on DCT,"
    Joint Technical Conference on Circuits/Systems, Computers and Communications,
    no.SP6-1, 1st July, 1995.
  4. XiaoXia ZOU, Shogo MURAMATSU, Hitoshi KIYA,
    "Optimum Block Size of Discrete Sine and Cosine Transforms for Symmetric Convolution,"
    Joint Technical Conference on Circuits/Systems, Computers and Communications,
    no.SP6-4, 1st July, 1995.
Domestic conference
  1. Masahiro IWAHASHI, Noriyoshi KAMBAYASHI, Hitoshi KIYA,
    "None,"
    Technical Report of IEICE,
    no.DSP94-108, 1st January, 1995.
  2. Kazuko FUKUDA, Shigenori KINJO, Hiroshi OCHI, Hitoshi KIYA,
    "A Two-Dimensional Adaptive System Identification Utilizing the Two-Dimensional DFT Frequency Sampling Filter (FSF) Bank,"
    Technical Report of IEICE,
    no.CAS94-84, 1st January, 1995.
  3. Masaharu TAKANO, Yukiya MIURA, Hitoshi KIYA, Sachio NAITO,
    "None,"
    ,
    1st January, 1995.
  4. Yukie AKUTSU, Hitoshi KIYA,
    "None,"
    Technical Report of IEICE,
    no.DSP94-104, 1st January, 1995.
  5. Masaharu TAKANO, Yukiya MIURA, Hitoshi KIYA, Sachio NAITO,
    "None,"
    Technical Report of IEICE,
    no.ISEC94-53, 1st March, 1995.
  6. Hiroyuki KOBAYASHI, Hitoshi KIYA,
    "Digital Filters Allowing Lower Rate Operation,"
    General Conference of IEICE,
    no.A-181, 1st March, 1995.
  7. Kenichi SUZUKI, Shigenori KINJO, Hiroshi OCHI, Hitoshi KIYA,
    "A Preset Adaptive Equalizer utilizing the Frequency Sampling Filter Bank,"
    General Conference of IEICE,
    no.A-206, 1st March, 1995.
  8. Kazuko FUKUDA, Shigenori KINJO, Hiroshi OCHI, Hitoshi KIYA,
    "A Parallel ADF Utilizing the Two-Dimensional : DFT Freqency Sampling Filter(FSF)Bank,"
    General Conference of IEICE,
    no.A-208, 1st March, 1995.
  9. Katsushige MATSUBARA, Kiyoshi NISHIKAWA, Hitoshi KIYA,
    "Pipelined Adaptive Filters based on DLMS Algorithm,"
    General Conference of IEICE,
    no.A-211, 1st March, 1995.
  10. Hiroyuki KOBAYASHI, Hitoshi KIYA,
    "Perfect Reconstruction Condition of Non-maximally Decimated Filter Banks,"
    Technical Report of IEICE,
    no.DSP95-16, 1st May, 1995.
  11. Katsushige MATSUBARA, Kiyoshi NISHIKAWA, Hitoshi KIYA,
    "The Realization of Pipelined Adaptive Filters based on DLMS Algorithm and Its Evaluation,"
    Technical Report of IEICE,
    no.DSP95-68, 1st June, 1995.
  12. Masahiro IWAHASHI, Noriyoshi KAMBAYASHI, Hitoshi KIYA,
    "Bit Reduction of DCT basis of Transform Coding,"
    Technical Report of IEICE,
    no.IE95-29, 1st June, 1995.
  13. Shogo MURAMATSU, Hitoshi KIYA,
    "On Image Interpolation with DCT-II : the Investigation Based on Symmetric Convolution and the Reduction of Blocking Artifacts,"
    Technical Report of IEICE,
    1st June, 1995.
  14. Hiroyuki KOBAYASHI,
    "Implementation of Low Clock Rate Filtering using Oversampled DFT Filter Banks,"
    Technical Report of IEICE,
    no.DSP95-46, 1st June, 1995.
  15. Takeshi UCHIDA, Hitoshi KIYA, Akihiko YAMADA,
    "An Implementation of the Instruction Pipeline Model for an Evaluation of Partitioning in Hardware/Software Codesign,"
    Technical Report of IEICE,
    no.VLD95-39, 1st June, 1995.
  16. Kazunobu TOGUCHI, Hiroyuki KOBAYASHI, Hitoshi KIYA,
    "Subband Adaptive Filters with Over Sampled Perfect Reconstruction DFT Filter Banks,"
    Technical Report of IEICE,
    no.DSP95-79, 1st July, 1995.
  17. Shin SUZUKI, Takeo YOSHIDA, Yukiya MIURA, Hitoshi KIYA,
    "An Effective Construction Method of FFT Which Can Specify an Error Processing Element,"
    Technical Report of IEICE,
    no.FTS95-35, 1st August, 1995.
  18. Kiyoshi NISHIKAWA, Hitoshi KIYA,
    "An extended NLMS algorithm for colored input signals,"
    Society Conference of IEICE,
    no.A-78, 1st September, 1995.
  19. Naoya TAKEUCHI, Takeshi UCHIDA, Hitoshi KIYA, Akihiko YAMADA,
    "A Functional Unit Selection of VLIW Processor Based on Software Pipelining,"
    Technical Report of IEICE,
    no.VLD95-64, 1st September, 1995.
  20. Hisashi SAKANE, Hitoshi KIYA,
    "None,"
    IEICE Digital Signal Processing Symposium,
    no.B2.2, 1st November, 1995.
  21. Shogo MURAMATSU, Hitoshi KIYA,
    "Linear-Phase Paraunitary Filter Banks Based on Symmetric Convolution,"
    IEICE Digital Signal Processing Symposium,
    no.B8.4, 1st November, 1995.
  22. Kuniyuki KAJITA, Hiroyuki KOBAYASHI, Shogo MURAMATSU, Akihiko YAMADA, Hitoshi KIYA,
    "A Design Method of Oversampled Paraunitary DFT Filter Banks using Householder's factorization,"
    Technical Report of IEICE,
    no.DSP95-133, 1st December, 1995.
  23. Kiyoshi NISHIKAWA, Hitoshi KIYA,
    "On the Selection of Synthesis Filter Bank in Subband Adaptive Filtering,"
    Technical Report of IEICE,
    no.DSP95-135, 1st December, 1995.
  24. Takeo YOSHIDA, Tomoyuki OHTANI, Yukiya MIURA, Hitoshi KIYA,
    "A Method for Masking Multiple Stuck-at Faults on Bus by ADR,"
    Technical Report of IEICE,
    no.FTS95-72, 1st December, 1995.
Others
  1. Hitoshi KIYA, Hirotatsu YAMAZAKI, Kouji ASHIHARA,
    "An Oversampling Subband Adaptive Digital Filter with Rational Decimation Ratios,"
    Electronics and Communications in Japan, Part III,
    vol.78, no.1, pp.89--97, 1st January, 1995.
  2. Shogo MURAMATSU, Hitoshi KIYA,
    "An Extended Overlap-Add Method and Overlap-Save Method for Sampling Rate Conversion,"
    Electronics and Communications in Japan, Part III,
    vol.78, no.3, pp.62--73, 1st March, 1995.
  3. Hitoshi KIYA, Hirotatsu YAMAZAKI, Youji YAMADA,
    "A Method of Designing Filter Banks with Alias-Free Characteristics at Equally Spaced Points,"
    Electronics and Communications in Japan, Part III,
    vol.78, no.5, pp.34--43, 1st May, 1995.
  4. Hitoshi KIYA, Kiyoshi NISHIKAWA, Kouji ASHIHARA,
    "Improvement of Convergence Speed for Subband Adaptive Digital Filter Using the Multirate Repeating Method,"
    Electronics and Communications in Japan, Part III,
    vol.78, no.10, pp.37--45, 1st October, 1995.